A pulse width modulated (PWM) signal is generally a pulse sequence, wherein the width of each pulse is indicative of the input value of the signal. Pulse width modulation has many uses, for example in class D amplifiers, which operate in on/off modes and drive the load directly from the power supply, and are relatively efficient since they have small or minimal internal resistance.
However, PWM signals suffer from a number of problems. One problem relates to the transition rate of the signal. An ideal pulse has an infinite slope, i.e. zero rise time and fall time. A real pulse has a finite slope, meaning that the signal cannot switch from the logical low value to the logical high value, or vice versa, in zero time, and some time is required for switching. The energy losses of devices using PWM signals, such as class D amplifiers, increase as the transition rate of the signal increases. Energy losses occur on every transition, due to the energy required to switch the amplifier from OFF state to ON state, in addition to charge and discharge capacities, including parasitic capacities via serial resistance.
Therefore, it may be desirable to decrease the transition rate of the signal. However, in Sigma-Delta (SD) modulation or multi-level SD modulation, the signal-to-noise ratio (SNR) is improved as the oversampling ratio (OSR) increases, thus increasing the transition rate.
Thus, in order to reduce the AC losses and increase efficiency, it would be desirable to reduce the transition rate, while maintaining SNR performance. One approach for achieving this goal is to design a class D amplifier as described in FIG. 1, by using noise shaping digital-analog-converter 100 for converting the digital signal having a particular rate into an oversampled SD signal having two or more levels. The SNR of the noise shaping modulator increases as the OSR between the input signal and the SD rate is increased. The oversampling SD signal is fed into pulse width modulator 104, which provides stimuli to a class D driver 108 and through a low pass filter 112 to the load. The transition rate of this implementation is very high, therefore the efficiency of the class D amplifier implemented this way is limited.
An alternative solution for reducing energy losses while maintaining SNR involves decimation of the SD signal, so that the transition rate is reduced. However, good decimation of a signal requires an increase in the resolution of the output signal beyond the decimation ratio, which can require a clock rate which is non-feasible for digital implementation. A simple first order decimation by an integer R refers to summing every R consecutive samples, and generating one sample having the combined length. The output range of such sample is R times the original range. However, there is one output pulse instead of every R pulses, so the same system clock can be used. Further, simple down sampling a sigma-delta signal by a factor of R, causes the output range to be extended by a factor of R. Accurate decimation requires the extension of the output range by more than R, and may thus be infeasible due to the resolution being limited by available system clocks.
Due to the folding effect, caused by noise in the high frequencies part being added to the signal in the low frequencies part, simple decimation suffers from degraded SNR performance in the relevant frequency band, such as frequencies under 20 KHz, which are the human audible frequencies.
A known technique for decimating a signal involves accurate decimation, which reduces the high frequencies using a good low pass filter, but imposes higher clock rate requirements. Yet another known problem associated with PWM signals is the harmonic distortion, which is usually more severe when lower transition rate and wider pulses are used. The harmonic distortion is the result of effective sampling jitter which is correlated with the input samples. For normal PWM where each pulse starts at the beginning of its time frame, i.e. is left-aligned in its time-frame, the wider a pulse is, the later is the effective sampling time of the pulse. Thus, for a pure sinusoidal signal, the positive peak is shifted to the right while the negative peak is not shifted at all.
Referring now to FIG. 2, showing an original pure sinusoidal graph 200, and a distorted signal 204, which is the result of correlated jitter. The distorted signal coincides with the original signal on the low points 208, 208′ and 208″, and reaches maximal distortion on the high points 212, 212′ and 212″.
The effective sampling time suffers from a variable delay which may be up to half the time frame or the widest pulse, since the effective sampling time occurs in the middle of each pulse. Therefore, the overall peak-to-peak jitter is equal to half of the widest pulse, then reducing the pulse width by increasing the transition rate, reduces the distortion as well. However, as detailed above, reducing the pulse width will increase the transition rate and thus increase energy losses.
If the starting point of each pulse is changed to a random timing within the frame rather than left-aligned, the harmonic distortion will indeed reduce, but at the price of its energy spreading over the audio band, and adding a fixed background noise which is particularly disturbing in low level inputs.
Another known technique used is named Barrel Shifting in which each pulse starts at the phase at which the previous one ended. If overflow occurs, then rotation is used. This technique produces fixed jitter but spreads the spurious harmonics over the whole sampling range, and thus adds fixed noise.
There is thus a need in the art for a method for modified PWM signal, so that jitter and transition rate are reduced so that energy losses are reduced while SNR is not harmed, without requiring resolution higher than the maximal available system clock.